Size reduction of metal-oxide-semiconductor field-effect transistors (MOSFETs), including reduction of the gate length and gate oxide thickness, has enabled the continued improvement in speed, performance, density, and cost per unit function of integrated circuits over the past few decades. To further enhance transistor performance, MOSFET devices have been fabricated using strained channel regions located in portions of a semiconductor substrate. Strained channel regions allow enhanced carrier mobility to be realized, thereby resulting in increased performance when used for n-channel (NMOS) or for p-channel (PMOS) devices. Generally, it is desirable to induce a tensile strain in an NMOS transistor in the source-to-drain direction to increase electron mobility and to induce a compressive strain in a PMOS transistor in the source-to-drain direction to increase hole mobility. There are several existing approaches of introducing strain in the transistor channel region.
In one approach, semiconductor alloy layers, such as silicon-germanium or silicon-germanium-carbon, are formed in the source/drain regions, wherein the semiconductor alloy layers have a different lattice structure than the substrate. The different lattice structures impart strain in the channel region to increase carrier mobility.
The semiconductor alloy layers are typically in-situ doped epitaxial layers, providing a low resistance and inducing strain in the channel regions. The dopant, however, has a tendency to out diffuse into the channel region during the epitaxial thermal process, thereby degrading the device's short-channel characteristics. Furthermore, particularly with PMOS devices, hydrogen is used to improve the epitaxy quality. The hydrogen, however, degrades negative bias temperature instability (NBTI).
Therefore, there is a need for a semiconductor device, and a method of manufacture thereof, having a semiconductor alloy in the source/drain regions that reduces or prevents dopant diffusion into the channel region.